The make program is intended to automate the mundane aspects of transforming source code into an executable. You can specify the relationships between the elements of your program, and it knows exactly what steps need to be redone to produce the desired program.

The specification file, or Makefile, describes the relationship between the source, intermediate, and executable program files so that make can perform the minimum amount of work necessary to update the executable.

source

A simple Makefile example

#include <stdio.h>

int main() {
  printf("Hello world");
  return 0;
}

hello: hello.c
    gcc hello.c -o hello

$ make

A generic Makefile example

target: prereq1 prereq2
    commands
  • target - The thing you want to do. (e.g. - run tests, build, create a database)
  • prereq - The thing(s) that needs to be done before running the commands.
  • commands - Shell commands that achieve the desired result.

Satisfying Prerequsites

  1. The target must exist.
  2. The target’s timestamp must be newer than the timestamp of the target’s prerequisites.
  3. The prerequisite targets must be satisfied.

blog.mindlessnes.life/makefiles

Why use a Makefile?

[…] nowadays every project I create has a Makefile to bind together all task involved on that project. From bootstrapping the dev environment, running checks/test, starting a devserver, building releases and container images. Makefiles are just such a nice place to put scripts for these common tasks compared to normal shell scripts.

aeuquitas on hacker news

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